Home > References |
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| [AMS01] | 0.6 µm CMOS Process Technology, Internet document, Austria Micro Systems |
| [Jac01] | Bruce Jacob, "RiSC-16", Internet document, Online course, ENEE 646, Digital Computer Design, Fall 2001. |
| [Lil01] | Lily planting guide, Internet document (Lily means "Niloofar" in Farsi language) |
| [SmiP85] | J. E. Smith and A. R. Pleszkun, "Implementation of precise interrupts in pipelined processors.", Proc. 12th Annual International Symposium on Computer Architecture ( ISCA-14 ), pp. 36-44. June 1985. |
| [SohV87] | G. S. Sohi and S. Vajapeyam, "Instruction issue logic for high-performance, interruptable pipelined processors.", Proc. 14th Annual International Symposium on Computer Architecture (ISCA-14), pp. 27-34, June 1987. |
| [Tom67] | R. M. Tomasulo, "An efficient algorithm for exploiting multiple arithmetic units.", IBM Journal of Research and Development,11(1): 25-33. January 1967. |
| Phases | Timing | Branch Hazards | Synthesis |