Design and Implementation of
an Object-Oriented ASIP
Tailored to the JPEG Decompression Algorithm
Project Code: JPEG OO-ASIP
To design embedded systems that are quickly (i.e. without hardware remanufacturing) and easily (i.e. by software programming) extended and/or upgraded, the ODYSSEY embedded system design methodology advocates designing an “application-specific instruction-set processor” (ASIP) tailored the application-domain being supported; this ASIP can then be programmed to add missing functionalities and/or to correct malfunctioning parts. This suggests capturing the basic operations of the target application-domain in an ASIP that is extensible by programming. In the domain of image (de)compression applications, the JPEG algorithm is the base of many image (de)compression algorithms, including MPEG2 moving picture one. In this “JPEG OO-ASIP” thesis, an ASIP is to be designed that implements the JPEG decompression algorithm, and hence, is tailored to image decompression applications. This same ASIP is to be used in an associated thesis that implements the MPEG2 decompression.
The increasing complexity of embedded systems necessitates moving towards higher abstractions to improve designer productivity. Moreover, the dominance of software costs (80% software to 20% hardware) in the development of embedded systems suggests adopting a software design methodology (e.g. object-oriented design) at system level of abstraction. This motivates the ODYSSEY choice of object-oriented model as the modelling methodology.
On the other hand, multi-million dollar cost of chip manufacturing in deep submicron technologies, in addition to the high technical risk and complexity of it, motivates to use programmable platforms that can be manufactured once, but reused several times for similar applications or multiple generations of the same application. This is the motive behind the ODYSSEY choice of ASIP for the implementation methodology.
To evaluate the ODYSSEY choices of modelling and implementation methodologies and to characterise the applications that would benefit from it, the methodology should be applied to various application domains. This thesis and its associated “MPEG2” one assess the methodology on examples of digital signal processing (DSP) applications.
A general architecture has already been proposed for the ASIP in the ODYSSEY project. This architecture may, or may not, be quite suitable for the domain of image decompression applications. This thesis is to implement this architecture for the JPEG decompression algorithm, demonstrate it in action on a demo-board (only if the board is purchased before the thesis defence deadline), evaluate its design metrics (performance, power consumption, area, and design time), compare it to similar implementations (full software, full hardware, and mixed implementations), propose improvements on the architecture, and finally implement and evaluate these improvements.
You should be a second-year MS student in the “Computer Architecture” major, familiar with hardware design and SystemC hardware-description language. Good knowledge of advanced processor architectures is a must, as is expertise in object-oriented design techniques and methodology. Other positive points are prior knowledge of image decompression algorithms and experience of working with hardware simulation, synthesis, and power estimation tools.
In general, you will be cooperating with other members of the ODYSSEY project. Specifically, you and the student working on the “MPEG2” project will work in parallel on both “JPEG OO-ASIP” and “MPEG2” projects: i.e. each of you brings proposals for both the OO-ASIP and its software extensions; the proposals are discussed with other members of the group (probably compared to proposals by others), then the best proposal is approved and you implement the “JPEG OO-ASIP” one.
ODYSSEY: Object-oriented Design and sYntheSiS of Embedded sYstems